IBM unveils first sub-1-nanometer chip technology

IBM has taken a major step forward in developing the next generation of semiconductors. The technology company is the first in the world to develop a chip architecture with transistors on a scale of less than 1 nanometer. The new technology uses what is known as a nanostack architecture and is expected to pave the way for more powerful and energy-efficient chips.

The new chip is built using a 0.7-nanometer manufacturing process, or 7 angstroms. According to IBM, this marks the beginning of a new era for the chip industry, in which transistors are being developed with dimensions approaching the size of individual atoms. The chip contains nearly 100 billion transistors on a surface the size of a fingernail—nearly twice as many as IBM’s 2-nanometer chip from 2021.

Instead of placing transistors side by side, IBM stacks them in multiple layers on top of each other. This three-dimensional structure allows more transistors to be placed on the same surface area. Furthermore, different materials can be used for each layer, enabling performance and energy consumption to be optimized separately.

According to IBM, the new chip technology is expected to deliver up to 50 percent more computing power and 70 percent lower energy consumption than the previous 2-nanometer technology. This should offer particular benefits for applications such as generative AI, cloud computing, and future electronic devices.

The technology is still in the research phase, but IBM expects production to become possible within about five years.

ASML

The development took place at IBM’s research center in Albany, New York, where an ASML High NA EUV lithography machine will soon be installed. This new generation of chip-making machines makes it possible to produce even smaller, more precise circuits on chips and is considered a crucial technology for future chip generations.

To this end, IBM is collaborating with various partners, including ASML, Lam Research, Tokyo Electron, and SCREEN Semiconductor Solutions, on new manufacturing processes for High NA EUV.

ASML CEO Christophe Fouquet congratulated IBM on the breakthrough. According to him, the new nanostack architecture demonstrates that progress in the chip industry depends on a combination of new transistor designs, innovative materials, and three-dimensional integration.